politics · 2026-06-30

India's Chip Mission 2.0 Gets ₹1.25L Cr

India's Chip Mission 2.0 Gets ₹1.25L Cr

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Finance ministry's EFC cleared ₹1.25L Cr for India Semiconductor Mission 2.0, now awaiting cabinet approval. This is a 64% jump over ISM 1.0's ₹76K Cr.ISM 2.0 shifts focus from fab subsidies to chipmaking equipment, specialty chemicals, and domestic IP, areas where India imports nearly everything today.Chip design startups, equipment makers, and universities stand to gain. Industry wants govt to also become an early customer for homegrown chip tech.

What exactly shifts from ISM 1.0 to 2.0?

ISM 1.0 focused on attracting fab and packaging investments, offering 50% capex subsidies to lure global players. ISM 2.0 pivots upstream: domestic chipmaking equipment, specialty chemicals, industrial gases, and full-stack Indian IP. For example, 23 chip tapeouts were completed under ISM 1.0, but the tools and materials still came from imports. ISM 2.0 targets that gap.

How many of the 12 approved fabs are operational?

None of the 12 approved facilities are fully operational yet. The Tata-PSMC fab in Gujarat broke ground in 2024 and targets production by 2026. Semiconductor fabs typically take 3 to 5 years from groundbreaking to volume production. The gap between approval and output explains why ISM 2.0 is already being launched before ISM 1.0 fabs produce a single chip.

What equipment does India import for fabs?

India imports lithography systems, etching machines, chemical vapor deposition tools, and wafer handling equipment. ASML in the Netherlands dominates lithography. Applied Materials and Lam Research in the US supply etching and deposition. A single advanced lithography machine costs over $150Mn. No Indian company currently manufactures any of these tools at commercial scale.

What does 'full-stack Indian IP' mean here?

Full-stack IP means owning the chip design from architecture through to the final layout, not licensing core blocks from ARM or Synopsys. India's IIT Madras developed the SHAKTI processor using open-source RISC-V architecture, an example of indigenous IP. Owning the full stack eliminates royalty payments of 1 to 3% per chip and removes foreign licensing dependencies.

Why cut the 50% capex subsidy for ATMP?

ATMP and OSAT plants are assembly-stage facilities where India already has traction, with 12 approved projects under ISM 1.0. Cutting the 50% subsidy signals the govt views assembly as commercially viable now and wants to redirect funds toward equipment and raw materials, where India has zero domestic production. Without this shift, India would keep assembling chips using entirely imported machines and chemicals.

Could ATMP firms survive without the subsidy?

ATMP margins are thin, typically 8 to 12%, but capital costs are far lower than front-end fabs. A packaging plant costs ~$500Mn versus $10Bn+ for a leading-edge fab. Companies like Tata Electronics and Kaynes Technology have already committed investments. Reducing subsidies from 50% to perhaps 30% still leaves assembly economics workable, especially with growing domestic demand from electronics manufacturing.

How do specialty chemical imports create risk?

Semiconductor-grade chemicals require 99.9999% purity. India imports nearly all of these from Japan, Germany, and South Korea. During Covid, a single Japanese chemical supplier's factory fire disrupted global chip production for months. If India doesn't localize, a geopolitical disruption or export control on specialty gases could halt every Indian fab regardless of how much was spent building them.

What if fabs never reach viable scale in India?

India's domestic chip demand is projected at ~$110Bn by 2030, per the India Electronics and Semiconductor Association. A single fab needs ~5 GWh equivalent sustained demand to break even. Even if Indian fabs only capture 10 to 15% of domestic demand, that represents $11 to 16Bn annually, enough to sustain 2 to 3 mid-scale fabs. The risk isn't demand but execution speed and yield rates.

Which Indian chip firms could benefit most?

Chip design startups backed under the Design Linked Incentive scheme stand to gain, as ISM 2.0 links incentives to capital raised from the market. Companies like Signalchip and Mindgrove, which have completed tapeouts, could scale faster. Industry stakeholders also urged the govt to act as an early customer, similar to how ISRO procured from Indian space startups, giving young chip companies a launchpad.

Which startups could become early govt customers?

Signalchip, which built India's first 4G/5G modem chip, and Mindgrove, which designs RISC-V processors, are candidates. Defence and telecom are natural govt procurement channels. ISRO's strategy of buying from Indian space startups like Skyroot offers a template. Govt procurement of even 10K units at launch provides revenue certainty that helps startups raise follow-on capital.

How will universities plug the talent gap?

ISM 2.0 plans industry-led research and training centres at universities. IIT Bombay already runs a nanofabrication lab. India produces ~25K engineering graduates with VLSI skills annually but needs ~75K by 2030. The gap is most acute in process engineering, not design. Partnering with fabs for apprenticeships, as TSMC does with Taiwanese universities, could compress the training cycle from 4 years to 2.

Could India's chip push attract foreign firms?

ISM 2.0's equipment localization push could attract foreign firms to set up Indian manufacturing units rather than just export to India. Applied Materials already has R&D operations in Bengaluru. South Korea's Samsung and Japan's Tokyo Electron could localize under production-linked incentives. The 64% budget increase to ₹1.25L Cr signals subsidies large enough to offset India's infrastructure gaps for global players.

Source: inc42.com

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